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ARITH
2007
IEEE
13 years 11 months ago
P6 Binary Floating-Point Unit
The floating point unit of the next generation PowerPC is detailed. It has been tested at over 5 GHz. The design supports an extremely aggressive cycle time of 13 FO4 using a tech...
Son Dao Trong, Martin S. Schmookler, Eric M. Schwa...
ARITH
1999
IEEE
13 years 9 months ago
The S/390 G5 Floating Point Unit Supporting Hex and Binary Architectures
Eric M. Schwarz, Ronald M. Smith, Christopher A. K...
ARITH
2007
IEEE
13 years 11 months ago
Decimal Floating-Point Adder and Multifunction Unit with Injection-Based Rounding
Shrinking feature sizes gives more headroom for designers to extend the functionality of microprocessors. The IEEE 754R working group has revised the IEEE 754-1985 Standard for Bi...
Liang-Kai Wang, Michael J. Schulte
ACMSE
2004
ACM
13 years 10 months ago
Execution characteristics of SPEC CPU2000 benchmarks: Intel C++ vs. Microsoft VC++
Modern processors include features such as deep pipelining, multilevel cache hierarchy, branch predictors, out of order execution engine, and advanced floating point and multimedi...
Swathi Tanjore Gurumani, Aleksandar Milenkovic