81 search results - page 16 / 17 » PPL: an abstract runtime system for hybrid parallel programm... |
COORDINATION
2008
Springer
13 years 7 months ago
2008
Springer
Abstract. We propose and formalize HomeBPEL, a higher-order WSBPEL-like business process execution language where processes are firstclass values that can be stored in variables, p...
NDSS
2008
IEEE
14 years 10 days ago
2008
IEEE
Protocol reverse engineering has often been a manual process that is considered time-consuming, tedious and error-prone. To address this limitation, a number of solutions have rec...
MICRO
2010
IEEE
13 years 4 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
HPDC
2003
IEEE
13 years 11 months ago
2003
IEEE
Increasingly, scalable distributed applications are being constructed by integrating reusable components spanning multiple administrative domains. Dynamic composition and deployme...
IPPS
2010
IEEE
13 years 3 months ago
2010
IEEE
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...