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DATE
2002
IEEE
89views Hardware» more  DATE 2002»
13 years 10 months ago
A Hierarchical Test Scheme for System-On-Chip Designs
System-on-chip (SOC) design methodology is becoming the trend in the IC industry. Integrating reusable cores from multiple sources is essential in SOC design, and different design...
Jin-Fu Li, Hsin-Jung Huang, Jeng-Bin Chen, Chih-Pi...
ASPDAC
2005
ACM
111views Hardware» more  ASPDAC 2005»
13 years 7 months ago
Wave-pipelined on-chip global interconnect
— A novel wave-pipelined global interconnect system is developed for reliable, high throughput, on-chip data communication. We argue that because there is only a single signal pr...
Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen
CN
2007
149views more  CN 2007»
13 years 5 months ago
Adaptive congestion protocol: A congestion control protocol with learning capability
There is strong evidence that the current implementation of TCP will perform poorly in future high speed networks. To address this problem many congestion control protocols have b...
Marios Lestas, Andreas Pitsillides, Petros A. Ioan...