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» Packet Reordering in Network Processors
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DATE
2009
IEEE
110views Hardware» more  DATE 2009»
14 years 15 days ago
Light NUCA: A proposal for bridging the inter-cache latency gap
Abstract—To deal with the “memory wall” problem, microprocessors include large secondary on-chip caches. But as these caches enlarge, they originate a new latency gap between...
Darío Suárez Gracia, Teresa Monreal,...
GLOBECOM
2007
IEEE
14 years 2 days ago
AMBER Sched: An Analytical Model Based Resource Scheduler for Programmable Routers
—The growth of the Internet in the last years has been pushed by increasing requirements in terms of capacity, security and reliability. Moreover, improvements in multimedia appl...
Domenico Ficara, Stefano Giordano, Michele Pagano,...
ISCA
2005
IEEE
126views Hardware» more  ISCA 2005»
13 years 11 months ago
A Tree Based Router Search Engine Architecture with Single Port Memories
Pipelined forwarding engines are used in core routers to meet speed demands. Tree-based searches are pipelined across a number of stages to achieve high throughput, but this resul...
Florin Baboescu, Dean M. Tullsen, Grigore Rosu, Su...
ICDT
2005
ACM
128views Database» more  ICDT 2005»
13 years 11 months ago
The Pipelined Set Cover Problem
Abstract. A classical problem in query optimization is to find the optimal ordering of a set of possibly correlated selections. We provide an ion of this problem as a generalizati...
Kamesh Munagala, Shivnath Babu, Rajeev Motwani, Je...
INFOCOM
1998
IEEE
13 years 10 months ago
On Adaptive Bandwidth Sharing with Rate Guarantees
The objective of recent research in fair queueing schemes has been to efficiently emulate a fluid-flow generalized (weighted) processor sharing (GPS) system, as closely as possibl...
Nick G. Duffield, T. V. Lakshman, Dimitrios Stilia...