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» Parallel IP lookup using multiple SRAM-based pipelines
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AINA
2009
IEEE
14 years 4 days ago
A Pipelined IP Forwarding Engine with Fast Update
IP address lookup is one of the most important functionalities in the router design. To meet the requirements in high speed routers consisting of linecards with 40Gbps transfer ra...
Yeim-Kuan Chang, Yen-Cheng Liu, Fang-Chen Kuo
IEEEPACT
2003
IEEE
13 years 10 months ago
Memory Hierarchy Design for a Multiprocessor Look-up Engine
We investigate the implementation of IP look-up for core routers using multiple microengines and a tailored memory hierarchy. The main architectural concerns are limiting the numb...
Jean-Loup Baer, Douglas Low, Patrick Crowley, Neal...
ISCAS
2007
IEEE
161views Hardware» more  ISCAS 2007»
13 years 11 months ago
Hardware Architecture of a Parallel Pattern Matching Engine
Abstract— Several network security and QoS applications require detecting multiple string matches in the packet payload by comparing it against predefined pattern set. This proc...
Meeta Yadav, Ashwini Venkatachaliah, Paul D. Franz...
ICCAD
2001
IEEE
91views Hardware» more  ICCAD 2001»
14 years 2 months ago
A System for Synthesizing Optimized FPGA Hardware from MATLAB
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
Malay Haldar, Anshuman Nayak, Alok N. Choudhary, P...