309 search results - page 1 / 62 » Parallel Memory Architecture for Arbitrary Stride Accesses |
DDECS
2006
IEEE
13 years 11 months ago
2006
IEEE
—Parallel memory modules can be used to increase memory bandwidth and feed a processor with only necessary data. Arbitrary stride access capability with interleaved memories is d...
ICS
2010
Tsinghua U.
13 years 10 months ago
2010
Tsinghua U.
The emergence of multicore processors has increased the need for simple parallel programming models usable by nonexperts. The ability to specify subparts of a bigger data structur...
HPCA
2000
IEEE
13 years 9 months ago
2000
IEEE
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
HPCA
1999
IEEE
13 years 9 months ago
1999
IEEE
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
HPCA
2002
IEEE
14 years 5 months ago
2002
IEEE
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...