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MSO
2003
13 years 7 months ago
Simulation based Development of Efficient Hardware for Sort based Algorithms
The use of sub-optimal digital systems can at times lead to high speed, efficient, costeffective structures that are sufficient to perform needed tasks. We describe here a system ...
Niklas Hansson, Jay H. Harris
SC
2009
ACM
14 years 16 days ago
Scalable work stealing
Irregular and dynamic parallel applications pose significant challenges to achieving scalable performance on large-scale multicore clusters. These applications often require ongo...
James Dinan, D. Brian Larkins, P. Sadayappan, Srir...
GECCO
2008
Springer
111views Optimization» more  GECCO 2008»
13 years 6 months ago
Multi-task code reuse in genetic programming
We propose a method of knowledge reuse between evolutionary processes that solve different optimization tasks. We define the method in the framework of tree-based genetic progra...
Wojciech Jaskowski, Krzysztof Krawiec, Bartosz Wie...
TVCG
2011
274views more  TVCG 2011»
13 years 20 days ago
Memory-Scalable GPU Spatial Hierarchy Construction
We present two novel algorithms for constructing spatial hierarchies on GPUs. The first is for kd-trees that automatically balances between the level of parallelism and total mem...
Qiming Hou, Xin Sun, Kun Zhou, Christian Lauterbac...
DDECS
2007
IEEE
175views Hardware» more  DDECS 2007»
14 years 2 days ago
Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...