This paper analyses alternatives for the parallelization of the Simulated Annealing algorithm when applied to the placement of modules in a VLSI circuit considering the use of PVM...
Abstract- Simulated annealing (SA) is an effective general heuristic method for solving many combinatorial optimization problems. This paper deals with two problems in SA. One is ...
In this paper, we review parallel search techniques for approximating the global optimal solution of combinatorial optimization problems. Recent developments on parallel implementa...
Panos M. Pardalos, Leonidas S. Pitsoulis, Thelma D...
In this paper we propose a new parallelization scheme for Simulated Annealing — Hierarchical Parallel SA (HPSA). This new scheme features coarse-granularity in parallelization, d...
Shiming Xu, Wenguang Chen, Weimin Zheng, Tao Wang,...
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process, and as a result several research efforts have been un...