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» Parallel Simulated Annealing: An Adaptive Approach
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IPPS
1997
IEEE
13 years 9 months ago
Parallel Simulated Annealing: An Adaptive Approach
This paper analyses alternatives for the parallelization of the Simulated Annealing algorithm when applied to the placement of modules in a VLSI circuit considering the use of PVM...
Jonas Knopman, Júlio S. Aude
CEC
2003
IEEE
13 years 10 months ago
Adaptive temperature schedule determined by genetic algorithm for parallel simulated annealing
Abstract- Simulated annealing (SA) is an effective general heuristic method for solving many combinatorial optimization problems. This paper deals with two problems in SA. One is ...
Mitsunori Miki, Tomoyuki Hiroyasu, Jun'ya Wako, Ta...
IRREGULAR
1995
Springer
13 years 8 months ago
Parallel Search for Combinatorial Optimization: Genetic Algorithms, Simulated Annealing, Tabu Search and GRASP
In this paper, we review parallel search techniques for approximating the global optimal solution of combinatorial optimization problems. Recent developments on parallel implementa...
Panos M. Pardalos, Leonidas S. Pitsoulis, Thelma D...
ICA3PP
2005
Springer
13 years 10 months ago
Hierarchical Parallel Simulated Annealing and Its Applications
In this paper we propose a new parallelization scheme for Simulated Annealing — Hierarchical Parallel SA (HPSA). This new scheme features coarse-granularity in parallelization, d...
Shiming Xu, Wenguang Chen, Weimin Zheng, Tao Wang,...
VLSID
1996
IEEE
119views VLSI» more  VLSID 1996»
13 years 8 months ago
Parallel simulated annealing strategies for VLSI cell placement
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process, and as a result several research efforts have been un...
John A. Chandy, Prithviraj Banerjee