20 search results - page 4 / 4 » Parallel VLSI test in a shared-memory multiprocessor |
HPCA
1995
IEEE
13 years 8 months ago
1995
IEEE
Shared memory is an appealing abstraction for parallel programming. It must be implemented with caches in order toperform well, however, and caches require a coherence mechanism t...
SPAA
2003
ACM
13 years 10 months ago
2003
ACM
The general problem of verifying coherence for shared-memory multiprocessor executions is NP-Complete. Verifying memory consistency models is therefore NP-Hard, because memory con...
IEEEPACT
2006
IEEE
13 years 11 months ago
2006
IEEE
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
ICPP
2006
IEEE
13 years 11 months ago
2006
IEEE
This paper discusses fast parallel algorithms for evaluating several centrality indices frequently used in complex network analysis. These algorithms have been optimized to exploi...
ICCD
1997
IEEE
13 years 9 months ago
1997
IEEE
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process. All previous work in parallel simulated annealing bas...