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TPDS
1998
129views more  TPDS 1998»
13 years 5 months ago
The Offset Cube: A Three-Dimensional Multicomputer Network Topology Using Through-Wafer Optics
—Three-dimensional packaging technologies are critical for enabling ultra-compact, massively parallel processors (MPPs) for embedded applications. Through-wafer optical interconn...
W. Stephen Lacy, José Cruz-Rivera, D. Scott...
SC
2009
ACM
13 years 10 months ago
GPU based sparse grid technique for solving multidimensional options pricing PDEs
It has been shown that the sparse grid combination technique can be a practical tool to solve high dimensional PDEs arising in multidimensional option pricing problems in finance...
Abhijeet Gaikwad, Ioane Muni Toke
CORR
2011
Springer
197views Education» more  CORR 2011»
13 years 1 months ago
High-Throughput Transaction Executions on Graphics Processors
OLTP (On-Line Transaction Processing) is an important business system sector in various traditional and emerging online services. Due to the increasing number of users, OLTP syste...
Bingsheng He, Jeffrey Xu Yu
HICSS
2010
IEEE
185views Biometrics» more  HICSS 2010»
14 years 27 days ago
Concurrent Architecture for Automated Malware Classification
This paper introduces a new architecture for automating the generalization of program structure and the recognition of common patterns in the area of malware analysis. By using ma...
Timothy Daly, Luanne Burns
SASP
2008
IEEE
162views Hardware» more  SASP 2008»
14 years 11 days ago
Accelerating Compute-Intensive Applications with GPUs and FPGAs
—Accelerators are special purpose processors designed to speed up compute-intensive sections of applications. Two extreme endpoints in the spectrum of possible accelerators are F...
Shuai Che, Jie Li, Jeremy W. Sheaffer, Kevin Skadr...