770 search results - page 3 / 154 » Parallel simulation of chip-multiprocessor architectures |
HPCA
2007
IEEE
14 years 5 months ago
2007
IEEE
TJS
2010
12 years 12 months ago
2010
The Sort operation is a core part of many critical applications. Despite the large efforts to parallelize it, the fact that it suffers from high data-dependencies vastly limits it...
IEEEPACT
2009
IEEE
13 years 12 months ago
2009
IEEE
Translation Lookaside Buffers (TLBs) are a staple in modern computer systems and have a significant impact on overall system performance. Numerous prior studies have addressed TL...
SIGARCH
2008
13 years 5 months ago
2008
This paper presents a parallelization framework for emerging applications on the future chip multiprocessors (CMPs). With the continuing prevalence of CMP and the number of on-die...
CAL
2006
13 years 5 months ago
2006
Multiple core designs have become commonplace in the processor market, and are hence a major focus in modern computer architecture research. Thus, for both product development and ...