22 search results - page 5 / 5 » Parallel solvers for dense linear systems for heterogeneous ... |
HIPC
2004
Springer
13 years 10 months ago
2004
Springer
Parasitic extraction techniques are used to estimate signal delay in VLSI chips. Inductance extraction is a critical component of the parasitic extraction process in which on-chip ...
APPT
2005
Springer
13 years 7 months ago
2005
Springer
This paper presents design and experimental results of a parallel linear equation solver by asynchronous partial Gauss-Seidel method. The basic idea of this method is derived from ...