36 search results - page 4 / 8 » Parallel techniques for physically based simulation on multi... |
ICPP
1998
IEEE
13 years 9 months ago
1998
IEEE
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
ICCD
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper describes a core-customization process of a CISC processor core for a given application program. It aims at the power reduction in the CISC processor core by fully util...
HPCA
2006
IEEE
14 years 5 months ago
2006
IEEE
Processor architects have a challenging task of evaluating a large design space consisting of several interacting parameters and optimizations. In order to assist architects in ma...
VLSISP
2008
13 years 5 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
IPPS
2010
IEEE
13 years 3 months ago
2010
IEEE
Recently, there has been strong interest in large-scale simulations of biological spiking neural networks (SNN) to model the human brain mechanisms and capture its inference capabi...