22 search results - page 3 / 5 » Parallelization of loops with exits on pipelined architectur... |
LCTRTS
2005
Springer
13 years 11 months ago
2005
Springer
Software pipelining is a critical optimization for producing efficient code for VLIW/EPIC and superscalar processors in highperformance embedded applications such as digital sign...
ASAP
2006
IEEE
13 years 8 months ago
2006
IEEE
This paper proposes a novel parallel approach for pipelining of nested multiplexer loops to design high speed decision feedback equalizers (DFEs) based on look-ahead techniques. I...
IEEEPACT
2009
IEEE
14 years 24 days ago
2009
IEEE
—Bulk memory copying and initialization is one of the most ubiquitous operations performed in current computer systems by both user applications and Operating Systems. While many...
CLUSTER
2007
IEEE
14 years 15 days ago
2007
IEEE
— OpenMP can be supported in cluster environments by using distributed shared memory (DSM) systems. A portable approach for building DSM systems is to layer it on MPI. With these...
IPPS
2007
IEEE
14 years 13 days ago
2007
IEEE
Modern multi-core architectures have become popular because of the limitations of deep pipelines and heating and power concerns. Some of these multi-core architectures such as the...