3 search results - page 1 / 1 » Parasitics extraction involving 3-D conductors based on mult... |
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
Abstract— An efficient algorithm for three-dimensional (3D) capacitance extraction on multi-layered and lossy substrate is presented. The new algorithm represents a major improv...
DAC
1989
ACM
13 years 8 months ago
1989
ACM
We present an accurate and efficient method for extraction of parasitic capacitances in submicron integrated circuits. The method uses a 3-D finite element model in which the cond...
IPPS
2002
IEEE
13 years 9 months ago
2002
IEEE
Accurate estimation of signal delay is critical to the design and verification of VLSI circuits. At very high frequencies, signal delay in circuits with small feature sizes is do...