12 search results - page 3 / 3 » Partial Gating Optimization for Power Reduction During Test ... |
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
The development of Field Programmable Gate Arrays (FPGAs) had tremendous improvements in the last few years. They were extended from simple logic circuits to complex Systems-on-Ch...
CODES
2005
IEEE
13 years 11 months ago
2005
IEEE
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...