9 search results - page 2 / 2 » Passive reduced order modeling of multiport interconnects vi... |
ICCAD
2007
IEEE
14 years 2 months ago
2007
IEEE
— Clock meshes posses inherent low clock skews and excellent immunity to PVT variations, and have increasingly found their way to high-performance IC designs. However, analysis o...
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
As process technology continues to scale into the nanoscale regime, interconnect plays an ever increasing role in determining VLSI system performance. As the complexity of these sy...
DAC
2002
ACM
14 years 6 months ago
2002
ACM
This paper proposes a general hierarchical analysis methodology, HiPRIME, to efficiently analyze RLKC power delivery systems. After partitioning the circuits into blocks, we devel...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
In this paper we describe a flexible and efficient new algorithm for model order reduction of parameterized systems. The method is based on the reformulation of the parametric s...