13 search results - page 2 / 3 » Path Analysis and Renaming for Predicated Instruction Schedu... |
ISCA
1995
IEEE
13 years 8 months ago
1995
IEEE
Speculative execution is execution of instructions before it is known whether these instructions should be executed. Compiler-based speculative execution has the potential to achi...
ISCA
2000
IEEE
13 years 9 months ago
2000
IEEE
Our program benchmarks and simulations of novel circuits indicate that large-window processors are feasible. Using our redesigned superscalar components, a large-window processor ...
MICRO
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper describes a scalable, low-complexity alternative to the conventional load/store queue (LSQ) for superscalar processors that execute load and store instructions speculat...
MICRO
2000
IEEE
13 years 4 months ago
2000
IEEE
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
MICRO
2005
IEEE
13 years 10 months ago
2005
IEEE
Clustered machines partition hardware resources to circumvent the cycle time penalties incurred by large, monolithic structures. This partitioning introduces a long inter-cluster ...