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» Peak Power Minimization Through Datapath Scheduling
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ICCAD
2001
IEEE
143views Hardware» more  ICCAD 2001»
14 years 1 months ago
Transient Power Management Through High Level Synthesis
The use of nanometer technologies is making it increasingly important to consider transient characteristics of a circuit’s power dissipation (e.g., peak power, and power gradien...
Vijay Raghunathan, Srivaths Ravi, Anand Raghunatha...
DATE
2000
IEEE
114views Hardware» more  DATE 2000»
13 years 9 months ago
Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths
Designs which do not fully utilize their arithmetic datapath components typically exhibit a significant overhead in power consumption. Whenever a module performs an operation who...
Michael Münch, Norbert Wehn, Bernd Wurth, Ren...
ISSS
1995
IEEE
117views Hardware» more  ISSS 1995»
13 years 8 months ago
Scheduling and resource binding for low power
Decisions taken at the earliest steps of the design process may have a significantimpact on the characteristics of the final implementation. This paper illustrates how power con...
Enric Musoll, Jordi Cortadella
TPDS
2008
117views more  TPDS 2008»
13 years 4 months ago
Energy-Efficient Thermal-Aware Task Scheduling for Homogeneous High-Performance Computing Data Centers: A Cyber-Physical Approac
High Performance Computing data centers have been rapidly growing, both in number and size. Thermal management of data centers can address dominant problems associated with cooling...
Qinghui Tang, Sandeep K. S. Gupta, Georgios Varsam...
CODES
2003
IEEE
13 years 10 months ago
A low power scheduler using game theory
In this paper, we describe a new methodology based on game theory for minimizing the average power of a circuit during scheduling in behavioral synthesis. The problem of schedulin...
N. Ranganathan, Ashok K. Murugavel