Sciweavers

63 search results - page 2 / 13
» Perception Coprocessors for Embedded Systems
Sort
View
MAM
2002
110views more  MAM 2002»
13 years 5 months ago
Architecture of a fieldbus message scheduler coprocessor based on the planning paradigm
The use of a centralised planning scheduler in fieldbus-based systems requiring real-time operation has proved to be a good compromise between operational flexibility and timeline...
Ernesto Martins, Paulo A. C. S. Neves, José...
ERSA
2006
102views Hardware» more  ERSA 2006»
13 years 6 months ago
Process Isolation for Reconfigurable Hardware
One of the pillars of trust-worthy computing is process isolation, the ability to keep process data private from other processes running on the same device. While embedded operati...
Herwin Chan, Patrick Schaumont, Ingrid Verbauwhede
ICIP
2003
IEEE
14 years 7 months ago
Embedded co-processor architecture for CMOS based image acquisition
This paper describes a new co-processor architecture designed for CMOS sensor imaging. The co-processor unit is integrated into the image acquisition loop so as to exploit the ful...
Julien Dubois, Marco Mattavelli
BIRTHDAY
2012
Springer
12 years 1 months ago
A Qualitative Security Analysis of a New Class of 3-D Integrated Crypto Co-processors
3-D integration presents many new opportunities for architects and embedded systems designers. However, 3-D integration has not yet been explored by the cryptographic hardware com...
Jonathan Valamehr, Ted Huffmire, Cynthia E. Irvine...
ECRTS
1999
IEEE
13 years 9 months ago
Scheduling coprocessor for enhanced least-laxity-first scheduling in hard real-time systems
Scheduling time impact on system performance increases especially when using dynamic priority algorithms, because of the enlarged computational effort at runtime. This overhead ca...
Jens Hildebrandt, Frank Golatowski, Dirk Timmerman...