25 search results - page 1 / 5 » Performance Energy Optimization of DSP Transforms on the XSc... |
HIPEAC
2007
Springer
13 years 11 months ago
2007
Springer
The XScale processor family provides user-controllable independent configuration of CPU, bus, and memory frequencies. This feature introduces another handle for the code optimizat...
CODES
2005
IEEE
13 years 11 months ago
2005
IEEE
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
ASPDAC
2004
ACM
13 years 10 months ago
2004
ACM
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
ICCD
2001
IEEE
14 years 2 months ago
2001
IEEE
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm bas...
FPL
2007
Springer
13 years 11 months ago
2007
Springer
This paper describes the mapping of a two-dimensional inverse discrete cosine transform (2-D IDCT) onto a wordlevel reconfigurable Montium R processor. This shows that the IDCT i...