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MICRO
1998
IEEE
139views Hardware» more  MICRO 1998»
13 years 9 months ago
A Dynamic Multithreading Processor
We present an architecture that features dynamic multithreading execution of a single program. Threads are created automatically by hardware at procedure and loop boundaries and e...
Haitham Akkary, Michael A. Driscoll
ICS
2009
Tsinghua U.
14 years 4 days ago
Combining thread level speculation helper threads and runahead execution
With the current trend toward multicore architectures, improved execution performance can no longer be obtained via traditional single-thread instruction level parallelism (ILP), ...
Polychronis Xekalakis, Nikolas Ioannou, Marcelo Ci...
IPPS
2010
IEEE
13 years 3 months ago
Profitability-based power allocation for speculative multithreaded systems
With the shrinking of transistors continuing to follow Moore's Law and the non-scalability of conventional outof-order processors, multi-core systems are becoming the design ...
Polychronis Xekalakis, Nikolas Ioannou, Salman Kha...
HPCA
2006
IEEE
13 years 11 months ago
Speculative synchronization and thread management for fine granularity threads
Performance of multithreaded programs is heavily influenced by the latencies of the thread management and synchronization operations. Improving these latencies becomes especially...
Alex Gontmakher, Avi Mendelson, Assaf Schuster, Gr...
HPCA
1998
IEEE
13 years 9 months ago
Non-Stalling CounterFlow Architecture
The counterflow pipeline concept was originated by Sproull et al.[1] to demonstrate the concept of asynchronous circuits. This architecture relies on distributed decision making an...
Michael F. Miller, Kenneth J. Janik, Shih-Lien Lu