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DAC
2005
ACM
14 years 7 months ago
Power emulation: a new paradigm for power estimation
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
Joel Coburn, Srivaths Ravi, Anand Raghunathan
ACCESSNETS
2008
Springer
14 years 12 days ago
A Simulator of Periodically Switching Channels for Power Line Communications
An indoor power line is one of the most attractive media for in-home networks. However, there are many technical problems for achieving in-home power line communication (PLC) with ...
Taro Hayasaki, Daisuke Umehara, Satoshi Denno, Mas...
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
14 years 6 days ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...
BMCBI
2006
158views more  BMCBI 2006»
13 years 6 months ago
Parallelization of multicategory support vector machines (PMC-SVM) for classifying microarray data
Background: Multicategory Support Vector Machines (MC-SVM) are powerful classification systems with excellent performance in a variety of data classification problems. Since the p...
Chaoyang Zhang, Peng Li, Arun Rajendran, Youping D...
CGO
2008
IEEE
14 years 15 days ago
Prediction and trace compression of data access addresses through nested loop recognition
This paper describes an algorithm that takes a trace (i.e., a sequence of numbers or vectors of numbers) as input, and from that produces a sequence of loop nests that, when run, ...
Alain Ketterlin, Philippe Clauss