21 search results - page 2 / 5 » Performance Evaluation of a Non-Blocking Multithreaded Archi... |
RTCSA
2006
IEEE
13 years 11 months ago
2006
IEEE
To support high-performance and low-power for multimedia applications and for hand-held devices, embedded VLIW DSP processors are of research focus. With the tight resource constr...
RTAS
2010
IEEE
13 years 3 months ago
2010
IEEE
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
RTAS
2006
IEEE
13 years 11 months ago
2006
IEEE
Multicore architectures, which have multiple processing units on a single chip, are widely viewed as a way to achieve higher processor performance, given that thermal and power pr...
WORDS
2002
IEEE
13 years 10 months ago
2002
IEEE
The majority of today’s Internet-based services are generally not concerned about the level of Quality of Service (QoS) presented to their users. For many such services, however...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
In this paper, we present a methodology for low-cost and rapid context switch for multithreaded embedded processors with realtime guarantees. Context-switch, which involves saving...