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EUROPAR
2008
Springer
13 years 6 months ago
Performance Implications of Cache Affinity on Multicore Processors
Cache affinity between a process and a processor is observed when the processor cache has accumulated some amount of the process state, i.e., data or instructions. Cache affinity i...
Vahid Kazempour, Alexandra Fedorova, Pouya Alagheb...
JSSPP
2010
Springer
13 years 2 months ago
Proposal and Evaluation of APIs for Utilizing Inter-Core Time Aggregation Scheduler
This paper proposes and evaluates APIs for Inter-Core Time Aggregation Scheduler (IAS), which is a kernel-level thread scheduler to enhance performances of multi-threaded programs ...
Satoshi Yamada, Shigeru Kusakabe
EUROSYS
2011
ACM
12 years 8 months ago
SRM-buffer: an OS buffer management technique to prevent last level cache from thrashing in multicores
Buffer caches in operating systems keep active file blocks in memory to reduce disk accesses. Related studies have been focused on how to minimize buffer misses and the caused pe...
Xiaoning Ding, Kaibo Wang, Xiaodong Zhang
RTAS
2008
IEEE
13 years 11 months ago
WCET Analysis for Multi-Core Processors with Shared L2 Instruction Caches
Multi-core chips have been increasingly adopted by microprocessor industry. For real-time systems to safely harness the potential of multi-core computing, designers must be able t...
Jun Yan, Wei Zhang
ACMMSP
2006
ACM
247views Hardware» more  ACMMSP 2006»
13 years 10 months ago
A flexible data to L2 cache mapping approach for future multicore processors
This paper proposes and studies a distributed L2 cache management approach through page-level data to cache slice mapping in a future processor chip comprising many cores. L2 cach...
Lei Jin, Hyunjin Lee, Sangyeun Cho