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ASPLOS
2010
ACM
13 years 9 months ago
Micro-pages: increasing DRAM efficiency with locality-aware data placement
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
Kshitij Sudan, Niladrish Chatterjee, David Nellans...
PDP
2011
IEEE
12 years 9 months ago
Quantifying Thread Vulnerability for Multicore Architectures
Abstract—Continuously reducing transistor sizes and aggressive low power operating modes employed by modern architectures tend to increase transient error rates. Concurrently, mu...
Isil Oz, Haluk Rahmi Topcuoglu, Mahmut T. Kandemir...
PPOPP
2009
ACM
14 years 6 months ago
An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
Seunghwa Kang, David A. Bader
MICRO
2009
IEEE
160views Hardware» more  MICRO 2009»
14 years 7 days ago
Variation-tolerant non-uniform 3D cache management in die stacked multicore processor
Process variations in integrated circuits have significant impact on their performance, leakage and stability. This is particularly evident in large, regular and dense structures...
Bo Zhao, Yu Du, Youtao Zhang, Jun Yang 0002
SIGCOMM
2010
ACM
13 years 5 months ago
On the forwarding capability of mobile handhelds for video streaming over MANETs
Despite the importance of real-world experiments, nearly all ongoing research activities addressing video streaming over MANETs are based on simulation studies. Earlier research s...
Stein Kristiansen, Morten Lindeberg, Daniel Rodr&i...