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IPPS
2010
IEEE
13 years 2 months ago
Performance and energy optimization of concurrent pipelined applications
In this paper, we study the problem of finding optimal mappings for several independent but concurrent workflow applications, in order to optimize performance-related criteria tog...
Anne Benoit, Paul Renaud-Goud, Yves Robert
MICRO
2002
IEEE
124views Hardware» more  MICRO 2002»
13 years 10 months ago
Optimizing pipelines for power and performance
During the concept phase and definition of next generation high-end processors, power and performance will need to be weighted appropriately to deliver competitive cost/performan...
Viji Srinivasan, David Brooks, Michael Gschwind, P...
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
13 years 11 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
SIGARCH
2008
94views more  SIGARCH 2008»
13 years 5 months ago
Optimized on-chip pipelining of memory-intensive computations on the cell BE
Multiprocessors-on-chip, such as the Cell BE processor, regularly suffer from restricted bandwidth to off-chip main memory. We propose to reduce memory bandwidth requirements, and...
Christoph W. Kessler, Jörg Keller
ICCAD
2003
IEEE
142views Hardware» more  ICCAD 2003»
14 years 1 months ago
Energy Optimization of Distributed Embedded Processors by Combined Data Compression and Functional Partitioning
Transmitting compressed data can reduce inter-processor communication traffic and create new opportunities for DVS (dynamic voltage scaling) in distributed embedded systems. Howe...
Jinfeng Liu, Pai H. Chou