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» Performance evaluation of a new parallel preconditioner
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ICPP
2009
IEEE
14 years 20 days ago
Complexity Analysis and Performance Evaluation of Matrix Product on Multicore Architectures
The multicore revolution is underway, bringing new chips introducing more complex memory architectures. Classical algorithms must be revisited in order to take the hierarchical me...
Mathias Jacquelin, Loris Marchal, Yves Robert
ICDCSW
2006
IEEE
14 years 1 days ago
Implementation and Performance Study of a New NAT/Firewall Signaling Protocol
The NAT/Firewall NSIS Signaling Layer Protocol (NAT/Firewall NSLP) is a path-coupled signaling protocol for explicit Network Address Translator and firewall configuration within...
Niklas Steinleitner, Henning Peters, Xiaoming Fu
IPPS
2003
IEEE
13 years 11 months ago
Performance Monitoring and Evaluation of a UPC Implementation on a NUMA Architecture
UPC is an explicit parallel extension of ANSI C, which has been gaining rising attention from vendors and users. In this work, we consider the low-level monitoring and experimenta...
François Cantonnet, Yiyi Yao, Smita Annared...
EURODAC
1994
IEEE
116views VHDL» more  EURODAC 1994»
13 years 10 months ago
A performance evaluator for parameterized ASIC architectures
System-levelpartitioning assigns functionalobjects such as tasks or code segments to system-level components such as o-the-shelf processors or application-speci c architectures in...
Jie Gong, Daniel D. Gajski, Alex Nicolau
ICPPW
1999
IEEE
13 years 10 months ago
Performance Evaluation of Public-Key Certificate Revocation System with Balanced Hash Tree
A new method for updating certificate revocation trees (CRT) is proposed. Efficient revocation of publickey certificates is a current issue in public-key Infrastructure because a ...
Hiroaki Kikuchi, Kensuke Abe, Shohachiro Nakanishi