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CODES
2009
IEEE
14 years 2 days ago
On compile-time evaluation of process partitioning transformations for Kahn process networks
Kahn Process Networks is an appealing model of computation for programming and mapping applications onto multi-processor platforms. Autonomous processes communicate through unboun...
Sjoerd Meijer, Hristo Nikolov, Todor Stefanov
SC
2009
ACM
14 years 3 days ago
Future scaling of processor-memory interfaces
Continuous evolution in process technology brings energyefficiency and reliability challenges, which are harder for memory system designs since chip multiprocessors demand high ba...
Jung Ho Ahn, Norman P. Jouppi, Christos Kozyrakis,...
DATE
2007
IEEE
157views Hardware» more  DATE 2007»
13 years 11 months ago
Energy evaluation of software implementations of block ciphers under memory constraints
Software implementations of modern block ciphers often require large lookup tables along with code size increasing optimizations like loop unrolling to reach peak performance on g...
Johann Großschädl, Stefan Tillich, Chri...
DAC
2002
ACM
14 years 6 months ago
Design of a high-throughput low-power IS95 Viterbi decoder
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
Xun Liu, Marios C. Papaefthymiou
ICCD
2007
IEEE
195views Hardware» more  ICCD 2007»
13 years 9 months ago
LEMap: Controlling leakage in large chip-multiprocessor caches via profile-guided virtual address translation
The emerging trend of larger number of cores or processors on a single chip in the server, desktop, and mobile notebook platforms necessarily demands larger amount of on-chip last...
Jugash Chandarlapati, Mainak Chaudhuri