4 search results - page 1 / 1 » Performance-aware speculation control using wrong path usefu... |
HPCA
2008
IEEE
14 years 5 months ago
2008
IEEE
Fetch gating mechanisms have been proposed to gate the processor pipeline to reduce the wasted energy consumption due to wrongpath (i.e. mis-speculated) instructions. These scheme...
IPPS
2003
IEEE
13 years 9 months ago
2003
IEEE
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
MICRO
2000
IEEE
13 years 9 months ago
2000
IEEE
Value prediction breaks data dependencies in a program thereby creating instruction level parallelism that can increase program performance. Hardware based value prediction techni...
MICRO
1995
IEEE
13 years 8 months ago
1995
IEEE
Instruction Level Parallelism (ILP) speedups of an order-of-magnitude or greater may be possible using the techniques described herein. Traditional speculative code execution is t...