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ISLPED
2005
ACM
109views Hardware» more  ISLPED 2005»
13 years 11 months ago
Power reduction by varying sampling rate
The rate at which a digital signal processing (DSP) system operates depends on the highest frequency component in the input signal. DSP applications must sample their inputs at a ...
William R. Dieter, Srabosti Datta, Wong Key Kai
EMSOFT
2004
Springer
13 years 11 months ago
Practical PACE for embedded systems
In current embedded systems, one of the major concerns is energy conservation. The dynamic voltage-scheduling (DVS) framework, which involves dynamically adjusting the voltage and...
Ruibin Xu, Chenhai Xi, Rami G. Melhem, Daniel Moss...
PODC
2009
ACM
14 years 6 months ago
Tight bounds for clock synchronization
d Abstract] Christoph Lenzen Computer Engineering and Networks Laboratory (TIK) ETH Zurich, 8092 Zurich, Switzerland lenzen@tik.ee.ethz.ch Thomas Locher Computer Engineering and N...
Christoph Lenzen, Thomas Locher, Roger Wattenhofer
EMSOFT
2006
Springer
13 years 9 months ago
Time-triggered implementations of dynamic controllers
Bridging the gap between model-based design and platformbased implementation is one of the critical challenges for embedded software systems. In the context of embedded control sy...
Truong Nghiem, George J. Pappas, Rajeev Alur, Anto...
GLVLSI
2006
IEEE
155views VLSI» more  GLVLSI 2006»
13 years 11 months ago
Dynamic voltage scaling for multitasking real-time systems with uncertain execution time
Dynamic voltage scaling (DVS) for real-time systems has been extensively studied to save energy. Previous studies consider the probabilistic distributions of tasks’ execution ti...
Changjiu Xian, Yung-Hsiang Lu