Sciweavers

24 search results - page 2 / 5
» Phantom-BTB: a virtualized branch target buffer design
Sort
View
MICRO
1995
IEEE
140views Hardware» more  MICRO 1995»
13 years 9 months ago
A system level perspective on branch architecture performance
Accurate instruction fetch and branch prediction is increasingly important on today’s wide-issue architectures. Fetch prediction is the process of determining the next instructi...
Brad Calder, Dirk Grunwald, Joel S. Emer
CDES
2006
89views Hardware» more  CDES 2006»
13 years 6 months ago
Autonomous Instruction Memory Equipped with Dynamic Branch Handling Capability
Memory accesses have always been a speed-limiting factor, and memory bandwidth has always been an intensively contended scarce resource. Nevertheless, with recent pervasive emergen...
Hui-Chin Yang, Chung-Ping Chung
ISCA
2007
IEEE
115views Hardware» more  ISCA 2007»
13 years 11 months ago
VPC prediction: reducing the cost of indirect branches via hardware-based dynamic devirtualization
Indirect branches have become increasingly common in modular programs written in modern object-oriented languages and virtualmachine based runtime systems. Unfortunately, the pred...
Hyesoon Kim, José A. Joao, Onur Mutlu, Chan...
PLDI
2003
ACM
13 years 10 months ago
Optimizing indirect branch prediction accuracy in virtual machine interpreters
Interpreters designed for efficiency execute a huge number of indirect branches and can spend more than half of the execution time in indirect branch mispredictions. Branch target...
M. Anton Ertl, David Gregg
IEEEPACT
2000
IEEE
13 years 9 months ago
Dynamic Branch Prediction for a VLIW Processor
This paper describes the design of a dynamic branchpredictorfor a VLIW processor. The developed branch predictor predicts the direction of a branch, i.e., taken or not taken, and ...
Jan Hoogerbrugge