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INTEGRATION
2008
87views more  INTEGRATION 2008»
13 years 5 months ago
SafeResynth: A new technique for physical synthesis
Physical synthesis is a relatively young field in Electronic Design Automation. Many published optimizations for physical synthesis end up hurting the quality of the final design,...
Kai-Hui Chang, Igor L. Markov, Valeria Bertacco
ISQED
2008
IEEE
124views Hardware» more  ISQED 2008»
13 years 11 months ago
Parasitic Aware Process Variation Tolerant Voltage Controlled Oscillator (VCO) Design
In this paper we present a parasitic aware, process variation tolerant optimization methodology that may be applied to nanoscale circuits to ensure better yield. A currentstarved ...
Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos
ISPASS
2006
IEEE
13 years 11 months ago
Comparing simulation techniques for microarchitecture-aware floorplanning
— Due to the long simulation times of the reference input sets, microarchitects resort to alternative techniques to speed up cycle-accurate simulations. However, the reduction in...
Vidyasagar Nookala, Ying Chen, David J. Lilja, Sac...
SIGMOD
2008
ACM
138views Database» more  SIGMOD 2008»
13 years 5 months ago
Configuration-parametric query optimization for physical design tuning
Automated physical design tuning for database systems has recently become an active area of research and development. Existing tuning tools explore the space of feasible solutions...
Nicolas Bruno, Rimma V. Nehme
EUROMICRO
2003
IEEE
13 years 10 months ago
Polishing: A Technique to Reduce Variations in Cached Layer-Encoded Video
In this paper we present polishing, a novel technique to maximize the playback utility of a streamed layer-encoded video. Polishing reduces the amount of layer variations in a cac...
Michael Zink, Oliver Heckmann, Jens Schmitt, Andre...