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ISCAS
2005
IEEE
154views Hardware» more  ISCAS 2005»
13 years 10 months ago
An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arrays
—This paper presents a memory-conscious mapping methodology of computational intensive applications on coarse-grain reconfigurable arrays. By exploiting the inherent abundant amo...
Michalis D. Galanis, Gregory Dimitroulakos, Consta...
CGO
2003
IEEE
13 years 9 months ago
METRIC: Tracking Down Inefficiencies in the Memory Hierarchy via Binary Rewriting
In this paper, we present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applicatio...
Jaydeep Marathe, Frank Mueller, Tushar Mohan, Bron...
POPL
2007
ACM
14 years 5 months ago
Locality approximation using time
Reuse distance (i.e. LRU stack distance) precisely characterizes program locality and has been a basic tool for memory system research since the 1970s. However, the high cost of m...
Xipeng Shen, Jonathan Shaw, Brian Meeker, Chen Din...
SSDBM
2006
IEEE
197views Database» more  SSDBM 2006»
13 years 11 months ago
InterJoin: Exploiting Indexes and Materialized Views in XPath Evaluation
XML has become the standard for data exchange for a wide variety of applications, particularly in the scientific community. In order to efficiently process queries on XML repres...
Derek Phillips, Ning Zhang 0002, Ihab F. Ilyas, M....
IPPS
2005
IEEE
13 years 10 months ago
A Compiler Method for Memory-Conscious Mapping of Applications on Coarse-Grained Reconfigurable Architectures
This paper presents a compiler methodology for memoryaware mapping on 2-Dimensional coarse-grained reconfigurable architectures that aims in improving the mapped applications’ p...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...