In a dynamic reordering superscalar processor, the front-end fetches instructions and places them in the issue queue. Instructions are then issued by the back-end execution core. T...
Pipeline gating has been proposed for reducing wasted speculative execution due to branch mispredictions. As processors become deeper or wider, pipeline gating becomes more import...
Haitham Akkary, Srikanth T. Srinivasan, Rajendar K...
A method of managing the power consumption of an embedded, single-issue processor by controlling its pipeline depth is proposed. The execution time will be increased but, if the m...
A processor’s energy consumption can be reduced by compressing values (data and addresses) that flow through a processor pipeline and gating off portions of data path elements th...
— This paper presents a new power management technique integrated into a multithreaded microcontroller with builtin real-time scheduling schemes. Power management is done by hard...