169 search results - page 1 / 34 » Point to Point GALS Interconnect |
ASYNC
2002
IEEE
14 years 2 months ago
2002
IEEE
Reliable, low-latency channel communication between independent clock domains may be achieved using a combination of clock pausing techniques, self-calibrating delay lines and an ...
BMCBI
2010
13 years 9 months ago
2010
Background: In the yeast Saccharomyces cerevisiae, interactions between galactose, Gal3p, Gal80p, and Gal4p determine the transcriptional status of the genes required for the gala...
ENTCS
2008
13 years 9 months ago
2008
This paper reports on the design of a test chip built to test a) a new latency insensitive network fabric protocol and circuits, b) a new synchronizer design, and c) how efficient...
ARC
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. Conventional rigid router-based networks on chip incur certain overheads due to huge occupied logic resources and topology embedding, i.e., the mapping of a logical netwo...
CGF
2005
13 years 9 months ago
2005
The point set is a flexible surface representation suitable for both geometry processing and real-time rendering. In most applications, the control of the point cloud density is c...