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DATE
2007
IEEE
101views Hardware» more  DATE 2007»
13 years 11 months ago
Polynomial-time subgraph enumeration for automated instruction set extension
This paper proposes a novel algorithm that, given a data-flow graph and an input/output constraint, enumerates all convex subgraphs under the given constraint in polynomial time ...
Paolo Bonzini, Laura Pozzi
CASES
2004
ACM
13 years 8 months ago
Scalable custom instructions identification for instruction-set extensible processors
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. However, it is computationally expensive to automaticall...
Pan Yu, Tulika Mitra
VLSID
2008
IEEE
133views VLSI» more  VLSID 2008»
14 years 5 months ago
Exhaustive Enumeration of Legal Custom Instructions for Extensible Processors
Today's customizable processors allow the designer to augment the base processor with custom accelerators. By choosing appropriate set of accelerators, designer can significa...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul
MICRO
2003
IEEE
95views Hardware» more  MICRO 2003»
13 years 10 months ago
Processor Acceleration Through Automated Instruction Set Customization
Application-specific extensions to the computational capabilities of a processor provide an efficient mechanism to meet the growing performance and power demands of embedded appl...
Nathan Clark, Hongtao Zhong, Scott A. Mahlke
VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
14 years 5 months ago
A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions
In the automatic design of custom instruction set processors, there can be a very large set of potential custom instructions, from which a few instructions are required to be chos...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul