2 search results - page 1 / 1 » Post-Placement BDD-Based Decomposition for FPGAs |
FPL
2005
Springer
13 years 10 months ago
2005
Springer
This work explores the effect of adding a timing driven functional decomposition step to the traditional field programmable gate array (FPGA) CAD flow. Once placement has comple...
FPGA
2007
ACM
13 years 11 months ago
2007
ACM
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...