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» Post-Silicon Debug Using Programmable Logic Cores
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FPT
2005
IEEE
134views Hardware» more  FPT 2005»
13 years 10 months ago
Post-Silicon Debug Using Programmable Logic Cores
Producing a functionally correct integrated circuit is becoming increasingly difficult. No matter how careful a designer is, there will always be integrated circuits that are fabr...
Bradley R. Quinton, Steven J. E. Wilton
DATE
2008
IEEE
121views Hardware» more  DATE 2008»
13 years 11 months ago
On Automated Trigger Event Generation in Post-Silicon Validation
When searching for functional bugs in silicon, debug data is acquired after a trigger event occurs. A trigger event can be configured at run-time using a set of control registers...
Ho Fai Ko, Nicola Nicolici
GLVLSI
2008
IEEE
150views VLSI» more  GLVLSI 2008»
13 years 5 months ago
Using unsatisfiable cores to debug multiple design errors
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...
André Sülflow, Görschwin Fey, Rod...
FPGA
2001
ACM
137views FPGA» more  FPGA 2001»
13 years 9 months ago
Detailed routing architectures for embedded programmable logic IP cores
As the complexity of integrated circuits increases, the ability to make post-fabrication changes to fixed ASIC chips will become more and more attractive. This ability can be real...
Peter Hallschmid, Steven J. E. Wilton
FPGA
2003
ACM
156views FPGA» more  FPGA 2003»
13 years 10 months ago
Architectures and algorithms for synthesizable embedded programmable logic cores
As integrated circuits become more and more complex, the ability to make post-fabrication changes will become more and more attractive. This ability can be realized using programm...
Noha Kafafi, Kimberly Bozman, Steven J. E. Wilton