Sciweavers

9 search results - page 1 / 2
» Post-placement voltage island generation under performance r...
Sort
View
ASPDAC
2007
ACM
88views Hardware» more  ASPDAC 2007»
13 years 8 months ago
Voltage Island Generation under Performance Requirement for SoC Designs
Using multiple supply voltages on a SoC design is an efficient way to achieve low power. However, it may lead to a complex power network and a huge number of level shifters if we j...
Wai-Kei Mak, Jr-Wei Chen
ICCAD
2005
IEEE
94views Hardware» more  ICCAD 2005»
14 years 1 months ago
Post-placement voltage island generation under performance requirement
High power consumption not only leads to short battery life for handheld devices, but also causes on-chip thermal and reliability problems in general. As power consumption is prop...
Huaizhi Wu, I-Min Liu, Martin D. F. Wong, Yusu Wan...
SAC
2010
ACM
13 years 4 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen
ICCAD
2006
IEEE
110views Hardware» more  ICCAD 2006»
14 years 1 months ago
Voltage island aware floorplanning for power and timing optimization
Power consumption is a crucial concern in nanometer chip design. Researchers have shown that multiple supply voltage (MSV) is an effective method for power consumption reduction....
Wan-Ping Lee, Hung-Yi Liu, Yao-Wen Chang
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
13 years 8 months ago
TAPHS: thermal-aware unified physical-level and high-level synthesis
Thermal effects are becoming increasingly important during integrated circuit design. Thermal characteristics influence reliability, power consumption, cooling costs, and performan...
Zhenyu (Peter) Gu, Yonghong Yang, Jia Wang, Robert...