Sciweavers

296 search results - page 2 / 60
» Power Estimation in Sequential Circuits
Sort
View
VLSID
2002
IEEE
107views VLSI» more  VLSID 2002»
14 years 5 months ago
Estimation of Maximum Power-Up Current
Power gating is emerging as a viable solution to reduction of leakage current. However, power gated circuits are different from the conventional designs in the sense that a power-...
Fei Li, Lei He, Kewal K. Saluja
VLSID
2005
IEEE
255views VLSI» more  VLSID 2005»
14 years 5 months ago
Estimation of Switching Activity in Sequential Circuits Using Dynamic Bayesian Networks
We propose a novel, non-simulative, probabilistic model for switching activity in sequential circuits, capturing both spatio-temporal correlations at internal nodes and higher ord...
Sanjukta Bhanja, Karthikeyan Lingasubramanian, N. ...
ICTAI
1997
IEEE
13 years 8 months ago
Exploiting Symbolic Techniques within Genetic Algorithms for Power Optimization
This paper proposes an optimization algorithm for reducing the power dissipation in a sequential circuit. The encoding of the different states in a Finite State Machine is modifie...
S. Chuisano, Fulvio Corno, Paolo Prinetto, Maurizi...
ISQED
2009
IEEE
133views Hardware» more  ISQED 2009»
14 years 1 days ago
A novel ACO-based pattern generation for peak power estimation in VLSI circuits
Estimation of maximal power consumption is an essential task in VLSI circuit realizations since power value significantly affects the reliability of the circuits. The key issue o...
Yi-Ling Liu, Chun-Yao Wang, Yung-Chih Chen, Ya-Hsi...
ISLPED
1997
ACM
83views Hardware» more  ISLPED 1997»
13 years 9 months ago
A symbolic algorithm for low-power sequential synthesis
We present an algorithm that restructures the state transition graph STG of a sequential circuit so as to reduce power dissipation. The STG is modi ed without changing the behav...
Balakrishna Kumthekar, In-Ho Moon, Fabio Somenzi