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» Power calculation and modeling in deep submicron
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ISQED
2011
IEEE
398views Hardware» more  ISQED 2011»
12 years 9 months ago
Switching constraint-driven thermal and reliability analysis of Nanometer designs
As process technology continues to shrink, interconnect current densities continue to increase, making it ever more difficult to meet chip reliability targets. For microprocessors...
Srini Krishnamoorthy, Vishak Venkatraman, Yuri Apa...
ISLPED
2004
ACM
118views Hardware» more  ISLPED 2004»
13 years 11 months ago
On optimality of adiabatic switching in MOS energy-recovery circuit
The principle of adiabatic switching in conventional energyrecovery adiabatic circuit is generally explained in literature with the help of the rudimentary RC circuit driven by a ...
Baohua Wang, Pinaki Mazumder
DATE
2010
IEEE
145views Hardware» more  DATE 2010»
13 years 10 months ago
Energy-efficient real-time task scheduling with temperature-dependent leakage
Abstract--Leakage power consumption contributes significantly to the overall power dissipation for systems that are manufactured in advanced deep sub-micron technology. Different f...
Chuan-Yue Yang, Jian-Jia Chen, Lothar Thiele, Tei-...
DSD
2002
IEEE
96views Hardware» more  DSD 2002»
13 years 10 months ago
Networks on Silicon: Blessing or Nightmare?
Continuing VLSI technology scaling raises several deep submicron (DSM) problems like relatively slow interconnect, power dissipation and distribution, and signal integrity. Those ...
Paul Wielage, Kees G. W. Goossens
VLSID
2004
IEEE
117views VLSI» more  VLSID 2004»
14 years 6 months ago
Evaluating the Reliability of Defect-Tolerant Architectures for Nanotechnology with Probabilistic Model Checking
As we move from deep submicron technology to nanotechnology for device manufacture, the need for defect-tolerant architectures is gaining importance. This is because, at the nanos...
Gethin Norman, David Parker, Marta Z. Kwiatkowska,...