3 search results - page 1 / 1 » Power optimization of system-level address buses based on so... |
CODES
2000
IEEE
13 years 9 months ago
2000
IEEE
CODES
2004
IEEE
13 years 8 months ago
2004
IEEE
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
Cutting-edge applications of future embedded systems demand highest processor performance with low power consumption to get acceptable battery-life times. Therefore, low power opt...