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ASPDAC
2007
ACM
156views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Implementation of a Real Time Programmable Encoder for Low Density Parity Check Code on a Reconfigurable Instruction Cell Archit
- This paper presents a real time programmable irregular Low Density Parity Check (LDPC) Encoder as specified in the IEEE P802.16E/D7 standard. The encoder is programmable for fram...
Zahid Khan, Tughrul Arslan
CASES
2006
ACM
13 years 11 months ago
Methods for power optimization in distributed embedded systems with real-time requirements
Dynamic voltage scaling and sleep state control have been shown to be extremely effective in reducing energy consumption in CMOS circuits. Though plenty of research papers have st...
Razvan Racu, Arne Hamann, Rolf Ernst, Bren Mochock...
CN
2002
98views more  CN 2002»
13 years 5 months ago
New models and algorithms for programmable networks
In todays IP networks most of the network control and management tasks are performed at the end points. As a result, many important network functions cannot be optimized due to la...
Danny Raz, Yuval Shavitt
SAC
2004
ACM
13 years 11 months ago
DSPxPlore: design space exploration methodology for an embedded DSP core
High mask and production costs for the newest CMOS silicon technologies increase the pressure to develop hardware platforms useable for different applications or variants of the s...
Christian Panis, Ulrich Hirnschrott, Gunther Laure...
CODES
2005
IEEE
13 years 11 months ago
Power-smart system-on-chip architecture for embedded cryptosystems
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...