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MICRO
2002
IEEE
105views Hardware» more  MICRO 2002»
13 years 9 months ago
Power protocol: reducing power dissipation on off-chip data buses
K. Basu, Alok N. Choudhary, Jayaprakash Pisharath,...
ICCD
2005
IEEE
109views Hardware» more  ICCD 2005»
14 years 1 months ago
VALVE: Variable Length Value Encoder for Off-Chip Data Buses.
We propose VAriable Length Value Encoding (VALVE) technique to reduce the power consumption in the off-chip data buses. While past research has focused on encoding fixed length da...
Dinesh C. Suresh, Banit Agrawal, Walid A. Najjar, ...
APCCAS
2006
IEEE
304views Hardware» more  APCCAS 2006»
13 years 11 months ago
Low-Power Bus Transform Coding for Multilevel Signals
Abstract— In this paper, we propose a novel extension of BusInvert coding to handle 4-level pulse amplitude modulated (PAM-4) signals. A generalized mathematical model for energy...
Fakhrul Zaman Rokhani, Gerald E. Sobelman
ISLPED
2005
ACM
100views Hardware» more  ISLPED 2005»
13 years 10 months ago
A tunable bus encoder for off-chip data buses
Off-Chip buses constitute a significant portion of the total system power in embedded systems. Past research has focused on encoding contiguous bit positions in data values to red...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...
ISLPED
1995
ACM
100views Hardware» more  ISLPED 1995»
13 years 8 months ago
Simultaneous scheduling and binding for power minimization during microarchitecture synthesis
ABSTRACT { Sub-micron technologies and the increasing size and complexity of integrated components have aggravated the e ect of long interconnects and buses, compared to that of ga...
Aurobindo Dasgupta, Ramesh Karri