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» Power protocol: reducing power dissipation on off-chip data ...
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CF
2007
ACM
13 years 9 months ago
Speculative supplier identification for reducing power of interconnects in snoopy cache coherence protocols
In this work we reduce interconnect power dissipation in Symmetric Multiprocessors or SMPs. We revisit snoopy cache coherence protocols and reduce unnecessary interconnect activit...
Ehsan Atoofian, Amirali Baniasadi, Kaveh Aasaraai
GLVLSI
2003
IEEE
171views VLSI» more  GLVLSI 2003»
13 years 11 months ago
Combining wire swapping and spacing for low-power deep-submicron buses
We propose an approach for reducing the energy consumption of address buses that targets both the switching and the crosstalk components of power dissipation. The method is based ...
Enrico Macii, Massimo Poncino, Sabino Salerno
IPPS
2007
IEEE
13 years 12 months ago
A Power-Aware Prediction-Based Cache Coherence Protocol for Chip Multiprocessors
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
Ehsan Atoofian, Amirali Baniasadi
DAC
2002
ACM
14 years 6 months ago
Design of a high-throughput low-power IS95 Viterbi decoder
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
Xun Liu, Marios C. Papaefthymiou