12 search results - page 3 / 3 » Power-aware slack distribution for hierarchical VLSI design |
DAC
1997
ACM
13 years 9 months ago
1997
ACM
: Academic clock routing research results has often had limited impact on industry practice, since such practical considerations as hierarchical buffering, rise-time and overshoot ...
ISPD
2004
ACM
13 years 11 months ago
2004
ACM
Automated cell placement is a critical problem in VLSI physical design. New analytical placement methods that simultaneously spread cells and optimize wirelength have recently rec...