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» Power-optimal pipelining in deep submicron technology
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ISPD
2004
ACM
134views Hardware» more  ISPD 2004»
13 years 11 months ago
Performance-driven register insertion in placement
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
Dennis K. Y. Tong, Evangeline F. Y. Young