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CHES
2008
Springer
146views Cryptology» more  CHES 2008»
13 years 6 months ago
Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration
Dynamically reconfigurable systems are known to have many advantages such as area and power reduction. The drawbacks of these systems are the reconfiguration delay and the overhead...
Nele Mentens, Benedikt Gierlichs, Ingrid Verbauwhe...
COMSWARE
2007
IEEE
13 years 11 months ago
A Parallelization of ECDSA Resistant to Simple Power Analysis Attacks
The Elliptic Curve Digital Signature Algorithm admits a natural parallelization wherein the point multiplication step can be split in two parts and executed in parallel. Further pa...
Sarang Aravamuthan, Viswanatha Rao Thumparthy
CHES
2010
Springer
172views Cryptology» more  CHES 2010»
13 years 6 months ago
Analysis and Improvement of the Random Delay Countermeasure of CHES 2009
Random delays are often inserted in embedded software to protect against side-channel and fault attacks. At CHES 2009 a new method for generation of random delays was described tha...
Jean-Sébastien Coron, Ilya Kizhvatov
CASES
2010
ACM
13 years 2 months ago
A comprehensive analysis of performance and side-channel-leakage of AES SBOX implementations in embedded software
The Advanced Encryption Standard is used in almost every new embedded application that needs a symmetric-key cipher. In such embedded applications, high-performance as well as res...
Ambuj Sinha, Zhimin Chen, Patrick Schaumont
ICISC
2009
132views Cryptology» more  ICISC 2009»
13 years 2 months ago
Side-Channel Analysis of Cryptographic Software via Early-Terminating Multiplications
Abstract. The design of embedded processors demands a careful tradeoff between many conflicting objectives such as performance, silicon area and power consumption. Finding such a t...
Johann Großschädl, Elisabeth Oswald, Da...