8 search results - page 1 / 2 » Probabilistic error propagation in logic circuits using the ... |
ICCD
2008
IEEE
14 years 1 months ago
2008
IEEE
- A gate level probabilistic error propagation model is presented which takes as input the Boolean function of the gate, the signal and error probabilities of the gate inputs, and ...
TCAD
1998
13 years 4 months ago
1998
In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the noti...
CCL
1994
Springer
13 years 9 months ago
1994
Springer
Abstract: This paper describes the application of CLP (constraint logic programming) to several digital circuit design problems. It is shown that logic programming together with ef...
CL
2000
Springer
13 years 9 months ago
2000
Springer
A number of diagnostic and optimisation problems in Electronics Computer Aided Design have usually been handled either by specific tools or by mapping them into a general problem s...
TVLSI
2008
13 years 4 months ago
2008
Abstract--The quantum-dot cellular automata (QCA) model offers a novel nano-domain computing architecture by mapping the intended logic onto the lowest energy configuration of a co...